Why Parallel XOR Masks Don’t Speed CRC32 on FPGAs
Summary The engineer attempted to optimize a CRC32 MPEG-2 implementation on an FPGA by moving from a bit-serial shift-and-xor approach to a parallel combinatorial XOR network (Look-Up Table style optimization). Despite using mathematical modeling (MATLAB) to derive constant masks for each bit position, the synthesized hardware showed zero improvement in resource utilization or timing. The … Read more