How to experiment with cache coherence (MESI) and cache eviction across cores using shared memory?
Incident Report: Uncontrolled Cache Thrashing During MESI Protocol Experiment Summary A cache-coherence experiment caused severe source degradation due to uncontrolled cache thrashing and False Sharing in a shared memory region. The experiment pinned processes to different cores and measured memory latency via rdtsc, but inadvertently triggered L1-cache saturation and core-to-core coherence stalls lasting 150ms, affecting … Read more